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EMC1187 데이터시트(PDF) 29 Page - Microchip Technology |
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EMC1187 데이터시트(HTML) 29 Page - Microchip Technology |
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29 / 47 page ![]() Triple Channel 1°C Temperature Sensor with Hardware Thermal Shutdown and 1.8V SMBus Communications Datasheet SMSC EMC1187 29 Revision 1.0 (07-11-13) DATASHEET Bit 4 - HIGH - This bit is set when any of the temperature channels exceeds its programmed high limit. See the High Limit Status Register for specific channel information (Section 6.16). When set, this bit will assert the ALERT pin. Bit 3 - LOW - This bit is set when any of the temperature channels drops below its programmed low limit. See the Low Limit Status Register for specific channel information (Section 6.17). When set, this bit will assert the ALERT pin. Bit 2 - FAULT - This bit is asserted when a diode fault is detected on any of the external diode channels. See the External Diode Fault Register for specific channel information (Section 6.9). When set, this bit will assert the ALERT pin. Bit 1 - THERM - This bit is set when the any of the temperature channels exceeds its programmed Therm Limit. See the Therm Limit Status Register for specific channel information (Section 6.18). When set, this bit will assert the THERM pin. Bit 0 - HWSD - This bit is set when the External Diode 1 Temperature exceeds the Hardware Thermal Shutdown Limit set by the pull-up resistors on the ALERT and SYS_SHDN pins. When set, this bit will assert the SYS_SHDN pin. 6.4 Configuration Register 03h / 09h The Configuration Register controls the basic operation of the device. This register is fully accessible at either address. Bit 7 - MASK_ALL - Masks the ALERT pin from asserting. ‘0’ - (default) - The ALERT pin is not masked. If any of the appropriate status bits are set the ALERT pin will be asserted. ‘1’ - The ALERT pin is masked. It will not be asserted for any interrupt condition unless it is configured in comparator mode. The Status Register will be updated normally. Bit 5 - ALERT/COMP - Controls the operation of the ALERT pin. ‘0’ (default) - The ALERT acts as an Alert pin and has interrupt behavior as described in Section 5.5.1. ‘1’ - The ALERT acts as a THERM pin and has comparator behavior as described in Section 5.5.2. In this mode the MASK_ALL bit is ignored. Bit 4 - RECD - Disables the Resistance Error Correction (REC) for External Diode. ‘0’ (default) - REC is enabled for External Diode. ‘1’ - REC is disabled for External Diode. Bit 3 - RECD2 - Disables the Resistance Error Correction (REC) for External Diode 2 and External Diode 3. ‘0’ (default) - REC is enabled for External Diode 2 and External Diode 3. ‘1’ - REC is disabled for External Diode 2 and External Diode 3. Table 6.4 Configuration Register ADDR R/W REGISTER B7 B6 B5 B4 B3 B2 B1 B0 DEFAULT 03h R/W Configuration MASK_ ALL - ALERT/ COMP RECD RECD2 RANGE DAVG_ DIS APDD 00h 09h |
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