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EMC1001 데이터시트(PDF) 3 Page - Microchip Technology |
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EMC1001 데이터시트(HTML) 3 Page - Microchip Technology |
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3 / 24 page ![]() 2015 Microchip Technology Inc. DS20005411A-page 3 EMC1001 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings† Supply Voltage VDD..............................................-0.3 to 5.0V Voltage on ALERT/THERM2, SMDATA and SMCLK pins ...... ..............................................................................-0.3 to 5.5V Voltage on any other pin .............................. -0.3 to VDD+0.3V Lead Temperature Range ....................................................... .......................................... Refer to JEDEC Spec. J-STD-020 ESD Rating, All Pins (Human Body Model) ..................2000V † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise noted, VDD = 3.0V to 3.6V, TA= -25°C to +125°C, Typical values at TA = +27°C. Parameter Symbol Min. Typ. Max. Units Conditions DC Power Supply Voltage VDD 3.0 3.3 3.6 V Average Operating Current IDD — 36 — mA 0.0625 conversion/s, see Table 4-4 IPD — 4.8 10 µA Standby mode Temperature Measurement Accuracy — ±0.5 ±1.5 °C +40°C T A 85°C —±1 ±3 °C -25°C T A 125°C Resolution — 0.25 — °C Conversion Time — 26 — ms Voltage Tolerance Voltage at pin (ADDR/THERM) VTOL -0.3 — 3.6 V Voltage at pin (ALERT/THERM2, SMDATA,SMCLK) VTOL -0.3 — 5.5 V Digital Outputs (ADDR/THERM, ALERT/THERM2) Output Low Voltage VOL —— 0.4 V IOUT =-4 mA High Level Leakage Current IOH —0.1 1 mA VOUT =VDD SMBus Interface (SMDATA,SMCLK) Input High Level VIH 2.0 — — V Input Low Level VIL —0.8 V Input High/Low Current IIH/IIL -1 — 1 mA Hysteresis — 500 — mV Input Capacitance — 5 — pF Output Low Sink Current 6 — mA SMDATA = 0.6V SMBus Timing Clock Frequency FSMB 10 — 400 kHz Spike Suppression — — 50 ns Bus Free Time Start to Stop TBUF 1.3 — — µs Hold Time Start THD:STA 0.6 — — µs Note 1: 300 ns rise time maximum is required for 400 kHz bus operation. For lower clock frequencies, the maximum rise time is (0.1/FSMB) + 50 ns. |
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