AS3412 datasheet(39/84 Pages) AMSCO

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ams Datasheet

Page 39

[v1-00] 2016-Apr-06

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AS3412 − Detailed Description

OTP Memory and Internal Registers

The OTP (one-time programmable) memory consists of OTP

registers (0x10 - 0x17 and 0x30 - 0x35) and OTP fuses. The OTP

registers can be written as often as wanted but they are volatile

memory cells. It is possible to access the OTP registers using the

I²C interface for “soft programming” the part or via the

production programming interface pins (TRSDA and TRSCL). In

order to store chip configuration data to the ANC chip, the OTP

registers are linked together with the OTP fuses shown in

Figure 52. The OTP fuse block is a shadow register of the OTP

registers that are nonvolatile memory cells. These registers

store chip parameters during power-down. Programming the

fuses can be done three times and is a permanent change. In

order to configure the ANC chip during startup the OTP fuse

content is loaded to the OTP registers. The AS3412 offers 3 OTP

fuse sets for storing the microphone gain making it possible to

change the gain 2 times for re-calibration or other purposes. In

order to determine the right register settings for microphone

gain in production, as well as in the engineering design phase,

the non-volatile OTP registers should be used without OTP

programming. This allows you to configure all registers as many

times as desired to find the best microphone gain calibration

value. Once all the right register settings have been found, the

OTP fuse block should be used to store these settings.

Figure 52:

A single OTP cell can be programmed only once. By default, the

cell is “0”; a programmed cell contains a “1”. Because it is not

possible to reset a programmed bit from “1” to “0”, multiple OTP

writes are possible, but only additional un-programmed

“0”-bits can be programmed to “1”.

OTP Register

0x30...0x35; 0x10...0x17

OTP

Fuses

WRITE

READ

WRITE

READ

MODE/CSCL

ANC/CSDA

TRSDA/BPL

TRSCL/BPR

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