ST92196A datasheet(66/268 Pages) STMICROELECTRONICS

부품명	ST92196A

상세설명	8/16-BIT MCU FOR TV APPLICATIONS WITH UP TO 96K ROM, ON-SCREEN-DISPLAY AND 1 OR 2 DATA SLICERS

PDF	268 Pages

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RESET AND CLOCK CONTROL UNIT (RCCU)

5.4 RESET/STOP MANAGER

The RESET/STOP Manager resets the device

when one of the three following triggering events

occurs:

– A hardware reset, consequence of a falling edge

on the RESET pin.

– A software reset, consequence of an HALT in-

struction when enabled.

– A Watchdog end of count.

The RESET input is schmitt triggered.

Note: The memorized Internal Reset (called RE-

SETI) will be maintained active for a duration of

32768 Oscin periods (about 8 ms for a 4 MHz crys-

tal) after the external input is released (set high).

This RESETI internal Reset signal is output on the

I/O port bit P5.0 (active low) during the whole reset

phase until the P5.0 configuration is changed by

software. The true internal reset (to all macrocells)

will only be released 511 Reference clock periods

after the Memorized Internal reset is released.

It is possible to know which was the last RESET

triggering event, by reading bits 5 and 6 of register

CLK_FLAG.

Figure 30. Reset Overview

Figure 31. Recommended Signal to be Applied

on Reset Pin

Build-up Counter

RCCU

True

RESET

RESETI

Memorized

Reset

Internal

Reset

VRESET

VDD

0.7 VDD

0.3 VDD

20 µs

Minimum

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