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MRF24XA-I/MQ 데이터시트(PDF) 13 Page - Microchip Technology

부품명 MRF24XA-I/MQ
상세설명  Low-Power, 2.4 GHz ISM-Band IEEE 802.15.4??RF
PDF  258 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MRF24XA-I/MQ 데이터시트(HTML) 13 Page - Microchip Technology

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 2015 Microchip Technology Inc.
Preliminary
DS70005023C-page 13
MRF24XA
2.6
Memory Organization
Table 2-5 shows that memory is functionally divided
into Special Function Registers (SFR) and data buffers.
The SFRs provide control, status and device Configura-
tion addressing for MRF24XA operations. Data buffers
serve as temporary buffers for data transmission and
reception. Memory is accessed through two addressing
methods: Short (1 byte) and Long (2 bytes).
2.6.1
ADDRESS OVERVIEW
MRF24XA contains two Addressing modes:
• Short Address Mode: Requires one byte for
address, and may be used to access the first 64
on-chip control registers.
• Long Address Mode: Requires two bytes for
address, and may be used to access all on-chip
registers and data buffers. Figure 2-4 illustrates
these modes.
TABLE 2-5:
MRF24XA MEMORY MAP
SYSTEM LEVEL
MAC
PHY
TX and EXTDEV
MAC
PHY
DATA BUFFER 1
DATA BUFFER 2
RESERVED
0x00
...
0x0F
0x39
0x3A
...
0x30
0x2F
...
0x10
0x3F
...
0x40
...
0x60
0x70
0x284
0x285
...
0x200
0x1FF
0x2FF
...
0x385
0x384
0x300
0x3FF
...
...
PIR4 (0x07)
PIE1 (0x08)
RESERVED
RESERVED
...



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