VPC3201A datasheet(38/78 Pages) MICRONAS

38 / 78 page

VPC 323xD, VPC 324xD

ADVANCE INFORMATION

Micronas

h’8b

w/r

NUMBER OF PIXEL PER LINE:

Only used in the expert modes:

bit[7:0]

For VPCpip and VPCsingle:

quarter of the number of pixels per line

in the active video segment to be used

as a inset picture

For VPCmain:

quarter of the number of pixels per line

of the inset picture(s)

This register is updated when the PIPOPER register is written.

0NPIX

h’8c

w/r

NUMBER OF PIXEL PER LINE IN THE FIELD BUFFER(S):

bit[7:0]

quarter of the number of allocated pixels

per line in the field buffer(s)

bit[8]

0/1

use the internal default/external setting

via bit[7:0]

(must be set in the expert mode, optional

in the predefined modes)

bit[15:9]

reserved (set to 0)

This register is updated when the PIPOPER register is written.

0NPFB

h’8d-

h’8f

reserved, don’t write

CIP Control

h’90

w/r

SATURATION OF THE RGB/YCrCb COMPONENT INPUT:

bit[5:0]

saturation Cb( 0..63 )

bit[11:6]

saturation Cr( 0..63 )

bit[15:12]

reserved (set to 0)

CIPSAT

SATCb

SATCr

h’91

w/r

TINT CONTROL OF THE RGB/YUV COMPONENT INPUT:

bit[5:0]

tint (

−20..+20 in degrees )

bit[7:6]

reserved (set to 0)

0CIPTNT

h’92

w/r

BRIGHTNESS OF THE RGB/YUV COMPONENT INPUT:

bit[7:0]

brightness (

−128..+127 )

CONTRAST OF THE RGB/YUV COMPONENT INPUT:

bit[13:8]

contrast ( 0..63 )

bit[15:14]

reserved (set to 0)

CIPBRCT

CIPBR

CIPCT

h’94

w/r

SOFTMIXER CONTROL:

bit[0]

0/1

rgb/main video delay (0:normal 1:dynamic)

bit[1]

0/1

linear (0)/nonlinear(1) mixer select

bit[7:4]

fastblank gain (

−7 .. +7)

bit[3:2]

reserved (set to 0)

−1

CIPMIX1

RGBDLY

SELLIN

FBGAIN

h’95

w/r

SOFTMIXER CONTROL:

bit[5:0]

fastblank offset correction (0..63 )

( fb

−> fb−FBOFFS )

bit[7:6]

fastblank mode:

force rgb to cip out (equ. fb=0)

normal mode (fb active)

force main yuv to cip out (equ. fb=64)

CIPMIX2

FBOFFS

FBMODE

I2C Sub-

address

Number

of bits

Mode

Function

Default

Name

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