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HD66773R 데이터시트(PDF) 21 Page - Renesas Technology Corp |
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HD66773R 데이터시트(HTML) 21 Page - Renesas Technology Corp |
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21 / 133 page ![]() HD66773R Rev.1.10, Jun.21.2003, page 21 of 133 The relationship between GRAM data and display data (SS =”1”) The following figures illustrate the relationship between GRAM data and display data in each interface mode. R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B2 B1 B0 B3 DB 17 DB 16 DB 15 DB 14 DB 13 DB 12 DB 11 DB 10 DB 9 DB 8 DB 7 DB 6 DB 5 DB 4 DB 3 DB 2 DB 1 DB 0 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B4 B2 B1 B0 B3 Dither process circuit IF Data R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B2 B1 B0 B3 Note: n = lower eight bite of address (0 to 132) S (396 –3n) S (395 -3n) S (394 – 3n) Output pins 262,144 colors expansion circuit GRAM data 18-bit interface & hard dither mode GRAM data IF Data R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B2 B1 B0 B3 Note: n = lower eight bite of address (0 to 132) S (396 –3n) S (395 -3n) S (394 – 3n) Output pins 262,144 colors expansion circuit R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B4 B2 B1 B0 B3 DB 17 DB 16 DB 15 DB 14 DB 13 DB 12 DB 11 DB 10 DB 8 DB 7 DB 6 DB 5 DB 4 DB 3 DB 2 DB 1 16-bit interface |
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