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DSC2311KL1-R0002T 데이터시트(PDF) 2 Page - Microchip Technology |
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DSC2311KL1-R0002T 데이터시트(HTML) 2 Page - Microchip Technology |
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2 / 18 page ![]() DSC2311 DS20005611A-page 2 2016 Microchip Technology Inc. 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † Supply Voltage .......................................................................................................................................... –0.3V to +4.0V Input Voltage .......................................................................................................................................–0.3V to VDD+0.3V ESD Protection (HBM) ...............................................................................................................................................4 kV ESD Protection (CDM) ............................................................................................................................................1.5 kV † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Specifications: VDD = 3.3V; TA = +25°C unless otherwise specified. Parameters Sym. Min. Typ. Max. Units Conditions Supply Voltage (Note 1)VDD 2.25 — 3.6 V — Supply Current (Note 2)IDD —21 23 mA EN pin low. All outputs disabled. Frequency Stability (Note 3) ∆f —— ±25 ppm Includes frequency variations due to initial tolerance, temperature, and power supply voltage. —— ±50 Aging ∆f — — ±5 ppm One year at +25°C Start-up Time (Note 4)tSU — — 5 ms T = +25°C Input Logic Levels VIH 0.75 x VDD —— V Input logic high VIL — — 0.25 x VDD Input logic low Output Disable Time tDA —— 5 ns — Output Enable Time tEN —— 20 ns — Pull-Up Resistor (Note 2)— — 40 — kΩ Pull-up exists on all digital IO Output Logic Levels VOH 0.9 x VDD —— V Output logic high, I = ±6 mA VOL — — 0.1 x VDD Output logic low, I = ±6 mA Output Transition Time tR —1.1 2.0 ns Rise time. 20% to 80%; CL = 15 pF tF —1.4 2.0 Fall time. 20% to 80%; CL = 15 pF Frequency f0 2.3 — 170 MHz Commercial/Industrial temp. range 3.3 — 100 Automotive temp. range 3.3 — 170 Extended Industrial temp. range Note 1: Pin 4 VDD should be filtered with a 0.01 µF capacitor. 2: Output is enabled if Enable pad is floated or not connected. Operating current = disabled current + ∆IDD from FOUT1 + ∆IDD from FOUT2. See Current Consumption graph for more information. 3: For other ppm stabilities, please contact the factory. 4: tSU is time to 100 ppm stable output frequency after VDD is applied and outputs are enabled. 5: Period jitter includes crosstalk from adjacent output. |
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