OMAP3530ECUS datasheet(8/265 Pages) TI1

8 / 265 page

OMAP3530, OMAP3525

SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013

www.ti.com

OMAP3530 and OMAP3525 Applications

4.2

Output Clock Specifications

....................... 140

Processors

............................................... 1

4.3

DPLL and DLL Specifications

..................... 142

1.1

Features

............................................. 1

VIDEO DAC SPECIFICATIONS

.................... 148

1.2

Applications

.......................................... 3

5.1

Interface Description

.............................. 148

1.3

Description

........................................... 4

5.2

Electrical Specifications Over Recommended

Operating Conditions

.............................. 150

1.4

Functional Block Diagram

........................... 5

5.3

Analog Supply (vdda_dac) Noise Requirements

. 152

Revision History

.............................................. 9

5.4

External Component Value Choice

............... 153

TERMINAL DESCRIPTION

........................... 10

TIMING REQUIREMENTS AND SWITCHING

2.1

Terminal Assignment

............................... 10

CHARACTERISTICS

................................. 154

2.2

Pin Assignments

.................................... 14

6.1

Timing Test Conditions

........................... 154

2.3

Ball Characteristics

................................. 27

6.2

Interface Clock Specifications

..................... 154

2.4

Multiplexing Characteristics

........................ 86

6.3

Timing Parameters

................................ 155

2.5

Signal Description

.................................. 94

6.4

External Memory Interfaces

....................... 156

ELECTRICAL CHARACTERISTICS

............... 119

6.5

Video Interfaces

................................... 185

3.1

Power Domains

................................... 119

6.6

Serial Communications Interfaces

................ 202

3.2

Absolute Maximum Ratings

....................... 121

6.7

Removable Media Interfaces

...................... 235

3.3

Recommended Operating Conditions

............. 123

6.8

Test Interfaces

.................................... 250

3.4

DC Electrical Characteristics

...................... 125

PACKAGE CHARACTERISTICS

................... 256

3.5

Core Voltage Decoupling

......................... 128

7.1

Package Thermal Resistance

..................... 256

3.6

Power-up and Power-down

....................... 130

7.2

Device Support

.................................... 256

CLOCK SPECIFICATIONS

.......................... 134

4.1

Input Clock Specifications

......................... 135

Contents

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