PAC1710 datasheet(21/48 Pages) MICROCHIP

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 2015-2016 Microchip Technology Inc.

DS20005386B-page 21

PAC1710/20

5.2.5

ALERT RESPONSE ADDRESS

The ALERT output can be used as a processor

interrupt or as an SMBus Alert when configured to

operate as an interrupt.

When it detects that the ALERT pin is asserted, the

host will send the Alert Response Address (ARA) to the

general address of 0001_100xb. All devices with

active interrupts will respond with their client address,

as shown in Table 5-7.

The PAC1710/20 will respond to the ARA in the

following way if the ALERT pin is asserted:

• Send Slave Address and verify that full slave

address was sent (i.e. the SMBus communication

from the device was not prematurely stopped due

to a bus contention event).

• Set the MASK bit to clear the ALERT pin.

5.3

I2C Protocols

The PAC1710/20 supports I2C Block Read and Block

Write.

The protocols listed below use the convention in

Table 5-1.

5.3.1

BLOCK WRITE

The Block Write is used to write multiple data bytes to

a group of contiguous registers, as shown in Table 5-8.

TABLE 5-7:

ALERT RESPONSE ADDRESS PROTOCOL

START

Alert Response Address

ACK

Device Address

NACK

STOP

1  0

0001_100

YYYY_YYY

0  1

TABLE 5-8:

BLOCK WRITE PROTOCOL

START

Slave

Address

ACK

Address

ACK

1 0

YYYY_YYY

XXh

Data

ACK

Data

ACK

Address

Data

ACK

STOP

XXh

0  1

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