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MTCH6301T-I/ML 데이터시트(PDF) 13 Page - Microchip Technology |
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MTCH6301T-I/ML 데이터시트(HTML) 13 Page - Microchip Technology |
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13 / 40 page ![]() 2012-2014 Microchip Technology Inc. DS40001663B-page 13 MTCH6301 6.3 Generic Read/Write Protocol 6.3.1 MASTER READ WAVEFORM FIGURE 6-1: MASTER READ WAVEFORM 6.3.2 MASTER WRITE WAVEFORM FIGURE 6-2: MASTER WRITE WAVEFORM Note 1: The first byte read from the device denotes the number of bytes to follow. 2: The last byte read from the device must be followed by a nACK (‘1’) from the host controller. All other bytes should be followed with ACK (‘0’). 3: INT will be set low within 10 uS of a correct I2C™ address match. 4: All data (DATA0 – DATAn) must be read at once within a single I2C™ transaction, and Restart conditions are not supported. ACK P S ACK NACK ACK R Stop D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 0x25 1 [NUM_BYTES] [DATA0] [DATAn] Start INT SCL SDA (DATA) 2 1 3 4 Note 1: If the device is sleeping, it will ACK the address byte, but will not ACK the first byte of the transmission until it is awake. See Section 9. “Send Enable Touch command (0x00).” for details. 2: The first byte written to the controller denotes the number of bytes to follow. 3: Although it is not required all data be written in a single I2C™ transaction, it is recommended to reduce the chance of a timeout occurring. ACK P S ACK ACK W Stop D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 0x25 0 [NUM_BYTES] [DATA0] [DATAn] Start INT SCL SDA (DATA) 1 2 3 ACK |
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