ADP1762

Data Sheet

Rev. 0 | Page 12 of 18

ADJUSTABLE OUTPUT VOLTAGE

The output voltage of the ADP1762 can be set over a 0.5 V to

ground to set the output voltage. To calculate the output voltage,

use the following equation:

(3)

where:

VADJ pin and VOUT pin.

ENABLE FEATURE

The ADP1762 uses the EN pin to enable and disable the VOUT

pins under normal operating conditions. As shown in Figure 27,

when a rising voltage on EN crosses the active threshold, VOUT

turns on. When a falling voltage on EN crosses the inactive

threshold, VOUT turns off.

CH2 200mV

M4.0ms

A CH1

768mV

1

T

8.26ms

B

W

B

W

EN

Figure 27. Typical EN Pin Operation

As shown in Figure 28, the EN pin has hysteresis built in. This

hysteresis prevents on/off oscillations that can occur due to

noise on the EN pin as it passes through the threshold points.

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

EN VOLTAGE (V)

0.55 0.56 0.57 0.58 0.59 0.60 0.61 0.62 0.63 0.64 0.65

POWER-GOOD (PG) FEATURE

The ADP1762 provides a power-good pin (PG) to indicate the

status of the output. This open-drain output requires an external

device is in shutdown mode, current-limit mode, or thermal

shutdown, or if it falls below 90% of the nominal output voltage,

PG immediately transitions low. During soft start, the rising

threshold of the power-good signal is 95% of the nominal

output voltage.

The open-drain output is held low when the ADP1762 has a

sufficient input voltage to turn on the internal PG transistor. An

optional soft start delay can be detected. The PG transistor is

Power-good accuracy is 92.5% of the nominal regulator output

voltage when this voltage is rising, with a 95% trip point when

this voltage is falling.

Regulator input voltage brownouts or glitches trigger a power

CH2 1.00V

M100µs

A CH4

420mV

1

2

4

CH4 1.00V

PG

1

2

4

CH2 1.00V

M200µs

A CH1

3.00V

CH4 1.00V

PG