FEDL630Q464-01

ML630Q464/Q466

2/37

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Timers (TMR)

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8 bits × 8 channels

(Timer0-7: 16-bit x 4 configuration available by using Timer0-1 or Timer2-3, Timer4-5, Timer6-7)

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Selection of one shot timer mode is possible

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External clock can be selected as timer clock.

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Function Timers (FTM)

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16-bit × 4 channels

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Equipped with the timer/capture/PWM functions using a 16-bit counter

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An event trigger (external pin input interrupt or timer interrupt request) can control start/stop/clear of the timer (however,

the minimum pulse width of pin input is timer clock 3φ)

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1 to 64 dividing of LSCLK/OSCLK/HSCLK/external input selectable as timer clock

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Two types of PWM with the same period and different duties and complementary PWM with the dead time set can be

output.

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Real Time Clock (RTC)

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1 channels (99 years calendar, alarm, revision of the clock)

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Watchdog timer (WDT)

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Non-maskable interrupt and reset

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Free running

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Overflow period: 4 types selectable (125ms, 500ms, 2s, and 8s when LSCLK = 32.768 kHz)

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Synchronous serial port (SSIOF/SSIO)

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without FIFOs (SSIO) : 1 channel

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with 16-byte transmits and receives FIFOs (SSIOF) : 1 channel

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Master/slave selectable

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LSB first/MSB first selectable

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Clock polarity (data out at rising edge and data in at falling edge/data out at falling edge and data in at rising edge)

selectable

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8-bit length/16-bit length selectable

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Initial clock level (High start/Low start) selectable

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supports slave-select signal (only SSIOF)

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UART (UARTF/UART)

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without FIFOs (UART) : 1channel

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with 16-byte transmits and receives FIFOs (UARTF) :1 channels

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Full duplex buffer system

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Communication speed: Settable within the range of 2400bps to 115200bps.

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Programmable interface (data length, parity, stop bits selectable)

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Master/slave function (only I2CF)

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Fast mode (400 kHz), standard mode (100 kHz)

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USB full-speed device

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Compliant with Universal Serial Bus (USB)

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Full speed (12 Mbps) 1 port.

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End points: 5 or 6

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Supports all data transfer types (control transfer, bulk transfer, interrupt transfer, isochronous transfer).

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Built-in SOF generation and CRC5/16 generation functions

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Access size to data transfer FIFOs: 8 bits/16 bits/32 bits

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General-purpose ports (PORT)

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Input/output port × 38 channels (including secondary or tertiary or quaternary or quinary functions).

(ML630Q464 and ML630Q466: including LCD com/seg ports ( each 20 ports ))