전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

CLC2011ISO8EVB 데이터시트(PDF) 9 Page - Exar Corporation

부품명 CLC2011ISO8EVB
상세설명  Low Power, Low Cost, Rail-to-Rail I/O Amplifiers
PDF  17 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  EXAR [Exar Corporation]
홈페이지  http://www.exar.com
Logo EXAR - Exar Corporation

CLC2011ISO8EVB 데이터시트(HTML) 9 Page - Exar Corporation

Back Button CLC2011ISO8EVB Datasheet HTML 5Page - Exar Corporation CLC2011ISO8EVB Datasheet HTML 6Page - Exar Corporation CLC2011ISO8EVB Datasheet HTML 7Page - Exar Corporation CLC2011ISO8EVB Datasheet HTML 8Page - Exar Corporation CLC2011ISO8EVB Datasheet HTML 9Page - Exar Corporation CLC2011ISO8EVB Datasheet HTML 10Page - Exar Corporation CLC2011ISO8EVB Datasheet HTML 11Page - Exar Corporation CLC2011ISO8EVB Datasheet HTML 12Page - Exar Corporation CLC2011ISO8EVB Datasheet HTML 13Page - Exar Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 17 page
background image
© 2009 - 2014 Exar Corporation
9 / 17
exar.com/CLC2011
Rev 1D
CLC2011, CLC4011
Application Information
General Description
The CLCx011 family of amplifiers are single supply, general
purpose, voltage-feedback amplifiers. They are fabricated
on a complimentary bipolar process, feature a rail-to-rail
input and output, and are unity gain stable.
Basic Operation
Figures 1, 2, and 3 illustrate typical circuit configurations for
non-inverting, inverting, and unity gain topologies for dual
supply applications. They show the recommended bypass
capacitor values and overall closed loop gain equations.
Figure 4 shows the typical non-inverting gain circuit for
single supply applications.
+
-
Rf
0.1 F
6.8 F
Output
G = 1 + (Rf/Rg)
Input
+Vs
-Vs
Rg
0.1 F
6.8 F
RL
Figure 1: Typical Non-Inverting Gain Circuit
+
-
Rf
0.1 F
6.8 F
Output
G = - (Rf/Rg)
For optimum input offset
voltage set R1 = Rf || Rg
Input
+Vs
-Vs
0.1 F
6.8 F
RL
Rg
R1
Figure 2: Typical Inverting Gain Circuit
+
-
0.1 F
6.8 F
Output
G = 1
Input
+Vs
-Vs
0.1 F
6.8 F
RL
Figure 3: Unity Gain Circuit
+
-
Rf
0.1F
6.8F
Out
In
+Vs
+
Rg
Figure 4: Single Supply Non-Inverting Gain Circuit
Power Dissipation
Power dissipation should not be a factor when operating
under the stated 10kΩ load condition. However, applications
with low impedance, DC coupled loads should be analyzed
to ensure that maximum allowed junction temperature is
not exceeded. Guidelines listed below can be used to verify
that the particular application will not cause the device to
operate beyond it’s intended operating range.
Maximum power levels are set by the absolute maximum
junction rating of 150°C. To calculate the junction
temperature, the package thermal resistance value ThetaJA
(θJA) is used along with the total die power dissipation.
TJunction = TAmbient + (θJA × PD)
Where TAmbient is the temperature of the working
environment.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com