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MCP1632-BAE/MS 데이터시트(PDF) 17 Page - Microchip Technology |
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MCP1632-BAE/MS 데이터시트(HTML) 17 Page - Microchip Technology |
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17 / 34 page ![]() 2013 Microchip Technology Inc. DS20005254A-page 17 MCP1632 5.0 APPLICATION CIRCUITS 5.1 Typical Applications The MCP1632 PWM controller can be used for applications that require low-side MOSFET control, such as Boost, Buck-Boost, Flyback, SEPIC or Ćuk converters. By using an external high-side MOSFET driver (e.g. MCP14628), the MCP1632 device is able to control the buck converter. The MCP1632 PWM controller can be easily interfaced with a microcontroller in order to develop intelligent solutions, such as battery chargers or LED drivers. Figure 5-1 depicts the typical boost converter controlled by MCP1632. The input voltage applied on the VIN pin of the MCP1632 device should be kept below 5.5V. If the converter must operate with input voltages higher than 5.5V, a linear voltage regulator can be used to bias the MCP1632 controller. The Peak Current Mode control used in this case will ensure consistent performance over a wide range of operating conditions. The Q1 MOSFET is protected against overcurrent by internally limiting the maximum voltage at the output of the error amplifier of the controller. If the voltage applied on the CS pin exceeds 0.9V, the MCP1632 device will reduce the duty cycle in order to prevent overcurrent in Q1 MOSFET. The maximum drain peak current in Q1 can be calculated using Equation 5-1. The slope compensation ramp amplitude may limit the maximum peak current and must be considered when calculating this parameter. The DC offset of the slope compensation ramp (DCHIGH) is calculated using the equations provided in Figure 4-3. Note that the boost converter is not protected against the output short circuit. EQUATION 5-1: FIGURE 5-1: MCP1632 Boost Converter. I Peak Max A 0.9V D DC HIGH V – R SENSE -------------------------------------------------------------- = MCP1632 RVREF CSS VIN VOUT VREF COMP EN FB CS VEXT GND VIN LDO Q1 RSENSE RSLOPE L1 D1 + - + - CIN COUT R1 R2 R3 |
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