| 전자부품 데이터시트 검색엔진 |
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ICS840011 데이터시트(PDF) 7 Page - Integrated Circuit Systems |
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ICS840011 데이터시트(HTML) 7 Page - Integrated Circuit Systems |
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7 / 11 page ![]() 840011AG www.icst.com/products/hiperclocks.html REV. A OCTOBER 15, 2004 7 Integrated Circuit Systems, Inc. ICS840011 FEMTOCLOCKS™CRYSTAL-TO- LVCMOS/LVTTL CLOCK GENERATOR APPLICATION SCHEMATIC Figure 3A shows a schematic example of the ICS840011. An example of LVCMOS termination is shown in this schematic. Additional LVCMOS termination approaches are shown in the LVCMOS Termination Application Note. In this example, an 18pF parallel resonant 26.5625MHz crystal is used for generating 106.25MHz output frequency. The C1 = 27pF and C2 = 33pF are recommended for frequency accuracy. For different board layout, the C1 and C2 values may be slightly adjusted for opti- mizing frequency accuracy. FIGURE 3A. ICS840011 SCHEMATIC EXAMPLE PC BOARD LAYOUT EXAMPLE Figure 3B shows an example of P.C. board layout. The crystal X1 footprint in this example allows either surface mount (HC49S) or through hole (HC49) package. C3 is 0805. C1 and C2 are 0402. Other resistors and capacitors are 0603. This layout as- sumes that the board has clean analog power and ground planes. FIGURE 3B. ICS840011 PC BOARD LAYOUT EXAMPLE R3 43 Zo = 50 Ohm R2 10 OE C5 0.1u VDD U1 ICS840011 1 2 3 4 8 7 6 5 VDDA OE XTAL_OUT XTAL_IN VDD Q0 GND NC C4 0.1u C3 10uF C1 27pF C2 33pF VDD=3.3V X1 VDDA VDD Q LVCMOS |
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