| 전자부품 데이터시트 검색엔진 |
|
LM2202 데이터시트(PDF) 6 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
LM2202 데이터시트(HTML) 6 Page - National Semiconductor (TI) |
|
6 / 17 page ![]() Circuit Description (Continued) VIDEO AMPLIFIER SECTION (Output Stage) A simplified schematic of LM2202’s video amplifier output stage is shown in Figure 4. The output stage is the second gain stage. Ideally the gain of the second gain stage would be A V2 = −R21/R18 = −16. Because of the output stage’s low open loop gain, the gain is approximately A V2 = −10. Thus the maximum gain of the video amplifier is A V = AV1 x A V2 = 20. Transistors Q23 and Q24 provide a push-pull drive to the load. The output voltage can swing from 0.2V to 10V. CONTRAST CONTROL SECTION A simplified schematic of LM2202’s contrast control section is shown in Figure 5. A 0V to 4V DC voltage is applied at the contrast input (pin 8). Transistors Q29, Q30 and Q34 buffer and level shift the contrast voltage to the base of Q36. The voltage at the emitter of Q36 equals the contrast voltage (V cont) and the current through Q36’s collector is given by I C36 = Vcont/R28. Transistor Q36’s collector current is used to unbalance the current through the differential pair comprised of Q38 and Q40. Q40’s base is internally biased at 5.3V and made avail- able at pin 20. Pin 20 is externally connected to pin 1 through a 100 Ω resistor (see Figure 2 and Figure 3). The base of Q38 (pin 3) is externally connected to pin 2 through a 100 Ω resistor (see Figure 2 and Figure 3). With V cont = 2V, the dif- ferential pair (Q38, Q40) is balanced and the voltage at pins 1 and 2 is 5.3V. Under this condition, Q8’s collector current is equally split between Q9 and Q10 (see Figure 3) and the amplifier’s gain is half the maximum gain. If contrast voltage at pin 8 is greater than 2V then Q36’s collector current in- creases, thus pulling Q38’s collector node lower and conse- quently moving Q38’s base below 5.3V. With pin 2 at a lower voltage than pin 1, current through Q10 (see Figure 3) in- creases and the amplifier’s gain increases. With V cont = 4V, the amplifier’s gain is maximum. If the contrast voltage at pin 8 is less than 2V then Q36’s col- lector current decreases and Q38’s base is pulled above 5.3V. With pin 2 voltage greater than pin 1 voltage, less cur- rent flows through Q10 (see Figure 3), consequently the am- plifier’s gain decreases. With V cont = 0V, the amplifier’s gain is minimum (i.e., maximum attenuation). DS012591-9 FIGURE 3. Simplified Schematic of the LM2202 Video Amplifier Input Stage www.national.com 6 |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |