OPERATING

CONSIDERATIONS

PA04 • PA04A

GENERAL

Please read the “General Operating Considerations” sec-

tion, which covers stability, supplies, heatsinking, mounting,

current limit, SOA interpretation, and specification interpreta-

tion. Additional information can be found in the application

notes. For information on the package outline, heatsinks, and

mounting hardware, consult the “Accessory and Package

Mechanical Data” section of the handbook. The EK04 Evalu-

ation Kit makes prototype circuits a snap by providing an

EK04PC proto circuit board, MS05 mating socket, HS11

heatsink and hardware kit.

CURRENT LIMIT

The two current limit sense lines are to be connected directly

across the current limit sense resistor. For the current limit to

work correctly pin 11 must be connected to the amplifier

output side and pin 10 connected to the load side of the

current limit resistor, R

connection will bypass any parasitic resistances, Rp, formed

by sockets and solder joints as well as internal amplifier losses.

The current limiting resistor may not be placed anywhere in the

output circuit except where shown in Figure 1.

The value of the current limit resistor can be calculated as

follows:

.76

R

I

LIMIT

SAFE OPERATING AREA (SOA)

The MOSFET output stage of this power operational ampli-

fier has two distinct limitations:

1. The current handling capability of the MOSFET geometry

and the wire bonds.

2. The junction temperature of the output MOSFETs.

NOTE:

The output stage is protected against transient flyback.

However, for protection against sustained, high energy

flyback, external fast-recovery diodes should be used.

SLEEP MODE OPERATION

In the sleep mode, pin 12 (sleep) is tied to pin 9 (+V

This disables the amplifier’s internal reference and the ampli-

fier shuts down except for a trickle current of 3 mA which flows

into pin 12. Pin 12 should be left open if the sleep mode is not

required.

Several possible circuits can be built to take advantage of

this mode. In Figure 2A a small signal relay is driven by a logic

gate. This removes the requirement to deal with the common

mode voltage that exists on the shutoff circuitry since the sleep

mode is referenced to the +V

In Figure 2B, circuitry is used to level translate the sleep

mode input signal. The differential input activates sleep mode

with a differential logic level signal and allows common mode

voltages to

±V

BOOST OPERATION

With the V

BOOST

feature the small signal stages of the

amplifier are operated at higher supply voltages than the

amplifier’s high current output stage. +V

–V

amplifier. +V

current output stage. An additional 5V on the V

BOOST

pins is

sufficient to allow the small signal stages to drive the output

transistors into saturation and improve the output voltage

swing for extra efficient operation when required. When close

swings to the supply rails is not required the +V

pins must be strapped together as well as the –V

pins. The boost voltage pins must not be at a voltage lower than

the V

COMPENSATION

The external compensation components C

connected to pins 3 and 4. Unity gain stability can be achieved

at any compensation capacitance greater than 330 pF with at

least 60 degrees of phase margin. At higher gains more phase

shift can be tolerated in most designs and the compensation

capacitance can accordingly be reduced, resulting in higher

bandwidth and slew rate. Use the typical operating curves as

a guide to select C

Figure 2A. Sleep mode circuit.

LOGIC

K1

9

12

9

12

+V

BOOST

SLEEP

+V

BOOST

SLEEP

560

470

Q1

1K

Q2

–V

BOOST

470

LOGIC

INPUT

+

-

Ω

Ω

Ω

Ω

Figure 2B.

Sleep mode circuit.

Ri

1

2

10

11

R

CL

PA04

R

P

R

L

CL

CL

INPUT

7

Figure 1.

Current Limit.

5.0

2.0

.5

.2

2

SUPPLY TO OUTPUT DIFFERENTIAL (V)

5

10

20

50

200

20

DC

Tc

=

125°C

DC

Tc

=

85°C

DC

Tc

=

25°C

t =

10ms

t =

1ms

10

100

1.0

This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.

PA04U REV. I DECEMBER 1997

© 1997 Apex Microtechnology Corp.