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DM9102AF 데이터시트(PDF) 73 Page - List of Unclassifed Manufacturers |
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DM9102AF 데이터시트(HTML) 73 Page - List of Unclassifed Manufacturers |
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73 / 77 page ![]() DM9102A Single Chip Fast Ethernet NIC controller Final Version: DM9102A-DS-F03 August 28, 2000 73 TP Interface Symbol Parameter Min. Typ. Max. Unit Conditions tTR/F 100TX+/- Differential Rise/Fall Time 3.0 --- 5.0 ns tTM 100TX+/- Differential Rise/Fall Time Mismatch 0 --- 0.5 ns tTDC 100TX+/- Differential Output Duty Cycle Distortion 0 0 0.5 ns tT/T 100TX+/- Differential Output Peak-to- Peak Jitter 0 --- 1.4 ns XOST 100TX+/- Differential Voltage Overshoot 0 --- 5 % Oscillator/Crystal Timing Symbol Parameter Min. Typ. Max. Unit Conditions tCKC OSC Cycle Time 39.996 40 40.004 ns TPWH OSC Pulse Width High 16 20 24 ns TPWL OSC Pulse Width Low 16 20 24 ns Auto-negotiation and Fast Link Pulse Timing Parameters Symbol Parameter Min. Typ. Max. Unit Conditions t1 Clock/Data Pulse Width --- 100 --- ns t2 Clock Pulse To Data Pulse Period 55.5 62.5 69.5 us DATA = 1 t3 Clock Pulse To Clock Pulse Period 111 125 139 us t4 FLP Burst Width - 2 - ms t5 FLP Burst To FLP Burst Period 8 16 24 ms - Clock/Data Pulses in a Burst 17 33 # FLP Bursts t3 FLP Burst FLP Burst t4 t5 NLPs |
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