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DM9000 데이터시트(PDF) 39 Page - List of Unclassifed Manufacturers |
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DM9000 데이터시트(HTML) 39 Page - List of Unclassifed Manufacturers |
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39 / 54 page ![]() DM9000 ISA to Ethernet MAC Controller with Integrated 10/100 PHY Final 39 Version: DM9000-DS-F02 June 26, 2002 10.4 AC Electrical Characteristics & Timing Waveforms 10.4.1 TP Interface Symbol Parameter Min. Typ. Max. Unit Conditions tTR/F 100TX+/- Differential Rise/Fall Time 3.0 - 5.0 ns tTM 100TX+/- Differential Rise/Fall Time Mismatch 0- 0.5 ns tTDC 100TX+/- Differential Output Duty Cycle Distortion 0- 0.5 ns tT/T 100TX+/- Differential Output Peak-to-Peak Jitter 0- 1.4 ns XOST 100TX+/- Differential Voltage Overshoot 0 - 5 % 10.4.2 Oscillator/Crystal Timing Symbol Parameter Min. Typ. Max. Unit Conditions tCKC TCKC 39.998 40 40.002 ns 50ppm tPWH TCKC 16 20 24 ns tPWL OSC Pulse Width Low 16 20 24 ns 10.4.3 Processor Register Read Timing Symbol Parameter Min. Typ. Max. Unit T1 System address valid to IOR valid 5 ns T2 IOR width 22 ns T3 SD Setup time 10 ns T4 IOR invalid to SD invalid 4 ns T5 IOR invalid to system address invalid 5 ns T6 IOR invalid to next IOR valid (access DM9000) 80 ns T7 System address valid to IO16,IO32 valid 5 ns T8 System address invalid to IO16, IO32 invalid 5 ns T5 T1 IOR SD →← ← → → ← ← → → T4 T3 → ← ← AEN,SA IO16,IO32 Note 1.2 T8 ← → T7 ← → T2 T6 ,CMD |
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