| 전자부품 데이터시트 검색엔진 |
|
DM9161 데이터시트(PDF) 39 Page - List of Unclassifed Manufacturers |
|
|
|||||||||||||||||||||||||||||
DM9161 데이터시트(HTML) 39 Page - List of Unclassifed Manufacturers |
|
39 / 47 page ![]() DM9161 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver Final 39 Version: DM9161-DS-F02 May 10,2002 9.4.18 RMII Timing Diagram TXD[1:0], TX_EN, RXD[1:0], CRS_DV, RX_ER REF_CLK Tsu Thold 9.4.19 RMII Timing Parameter Symbol Parameter Min. Typ. Max. Unit Conditions REF_CLK Frequency 50 MHz REF_CLK Duty Cycle 35 65 % Tsu TXD[1:0], TX_EN, RXD[1:0], CRS_DV, RX_ER Data Setup to REF_CLK rising edge 4ns Thold TXD[1:0], TX_EN, RXD[1:0], CRS_DV, RX_ER Data hold from REF_CLK rising edge 2ns |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |