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ST72754J9B1 데이터시트(PDF) 34 Page - STMicroelectronics |
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ST72754J9B1 데이터시트(HTML) 34 Page - STMicroelectronics |
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34 / 144 page ![]() ST72774/ST727754/ST72734 34/144 I/O PORTS (Cont’d) Figure 21. PC0, PC2 to PC7 Figure 22. PC1 DR DDR latch latch DR SEL DDR SEL VDD PAD OC1E OC1E Alternate enable Alternate PULL-UP P-BUFFER N-BUFFER 1 0 1 0 CMOS Schmitt Trigger VSS output DR SEL DDR SEL AV PULL-UP P-BUFFER N-BUFFER 1 0 CMOS Schmitt Trigger VSS VDD PAD DR DDR latch latch |
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