V

appearing in boldface type apply over the 0˚C to +70˚C range.

Symbol

Parameter

Conditions

Min

Typ

Max

Units

SWITCHING SECTION

I

OVP

OVP Pin Source Current

OVP = 3V

10

mA

GA

Error Amplifier DC Gain

76

dB

B

WEA

Error Amplifier Unity Gain

Bandwidth

5

MHz

V

RAMP_L

Ramp Signal Valley Voltage

1.25

V

V

RAMP_H

Ramp Signal Peak Voltage

3.25

V

t

SS

Soft Start Time

4096

Clock

Cycles

D

STEP_SS

Duty Cycle Step Change in

Soft Start

12.5

%

1.5V LDO CONTROLLER SECTION

V

SNS2

SNS2 Voltage

V

5.25V, I

(

Figure 1)

1.463

1.5

1.538

V

R

OUT2

Output Resistance

200

Ω

I

SNS2

SNS2 Pin Bias Current

When Regulating

21

µA

V

PWGD_HI

PWGD High Trip Point

(Note 4)

0.63

V

V

PWGD_LO

PWGD Low Trip Point

(Note 4)

0.44

V

2.5V LDO CONTROLLER SECTION

V

SNS3

SNS3 Voltage

V

5.25V, I

(

Figure 1)

2.438

2.5

2.563

V

R

OUT3

Output Resistance

200

Ω

I

SNS3

SNS3 Pin Bias Current

When Regulating

21

µA

V

PWGD_HI

PWGD High Trip Point

(Note 4)

0.63

V

V

PWGD_LO

PWGD Low Trip Point

(Note 4)

0.44

V

Note 1: Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating ratings are conditions under which the device operates

correctly. Operating Ratings do not imply guaranteed performance limits.

junction-to-ambient thermal resistance,

Note 3: The letter

N stands for the typical output voltages appearing in italic boldface type in Table 1.

Note 4: The output level of the PWGD pin is a logic AND of the power good function of the switching section, the 1.5V section and the 2.5V section.

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