Pin Description

Pin

Pin Name

Pin Function

1

LG

Low side N-FET gate driver output.

2

PGND

Ground for the two FET drivers of the switching section.

3V

DD

Supply for the FET gate drivers. Usually tied to +12V.

4

SNS2

Feedback pin for the 1.5V linear regulator.

5

G2

Gate drive output for the external N-MOS of the fast 1.5V linear regulator.

6

SGND

Ground for internal signal circuitry and system ground reference.

7V

CC

Supply voltage. Usually +5V.

8

SNS1

Output voltage monitor input for the switching regulator.

9

CS+

Switching regulator current sense input, positive node.

10

CS−

Switching regulator current sense input, negative node.

11

CP

Charge pump. Output is a square wave with 50% duty cycle. Amplitude is close to V

CC

voltage.

12

FREQ

Switching frequency adjustment pin. An external resistor is needed to set the desired

frequency.

13

EAO

Output of the error amplifier. Used for compensating the switching regulator.

14

FB

Inverting input of the error amplifier. Used for compensating the switching regulator.

15

PWGD

Open collector Power Good signal.

16

VID4

5-Bit DAC input, MSB.

17

VID3

5-Bit DAC input.

18

VID2

5-Bit DAC input.

19

VID1

5-Bit DAC input.

20

VID0

5-Bit DAC input, LSB.

21

G3

Gate drive pin for the external N-MOS of the 1.25V linear regulator.

22

SNS3

Feedback pin for the 1.25V linear regulator.

23

EN

Output Enable. A logic low shuts the whole chip down.

24

HG

High side N-FET gate driver output.

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