MCP73831-2ACISLASHMC datasheet(11/28 Pages) MICROCHIP

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 2005-2014 Microchip Technology Inc.

DS20001984G-page 11

MCP73831/2

3.0

PIN DESCRIPTION

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLES

3.1

Battery Management Input Supply

(VDD)

A supply voltage of [VREG (typical) + 0.3V] to 6V is

recommended. Bypass to VSS with a minimum of

4.7 µF.

3.2

Battery Charge Control Output

(VBAT)

Connect to positive terminal of battery. Drain terminal

of internal P-channel MOSFET pass transistor. Bypass

to VSS with a minimum of 4.7 µF to ensure loop stability

when the battery is disconnected.

3.3

Charge Status Output (STAT)

STAT is an output for connection to an LED for charge

status indication. Alternatively, a pull-up resistor can be

applied for interfacing to a host microcontroller.

STAT is a tri-state logic output on the MCP73831 and

an open-drain output on the MCP73832.

3.4

Battery Management 0V Reference

(VSS)

Connect to negative terminal of battery and input

supply.

3.5

Current Regulation Set (PROG)

Preconditioning, fast charge and termination currents

are scaled by placing a resistor from PROG to VSS.

The charge management controller can be disabled by

allowing the PROG input to float.

3.6

Exposed Thermal Pad (EP)

An internal electrical connection exists between the

Exposed Thermal Pad (EP) and the VSS pin. They must

be connected to the same potential on the Printed

Circuit Board (PCB).

For better thermal performance, it is recommended to

add vias from the land area of EP to a copper layer on

the other side of the PCB.

Pin No.

Symbol

Function

DFN

SOT-23-5

VDD

Battery Management Input Supply

2—

VDD

Battery Management Input Supply

VBAT

Battery Charge Control Output

4—

VBAT

Battery Charge Control Output

STAT

Charge Status Output

VSS

Battery Management 0V Reference

—

No Connection

PROG

Current Regulation Set and Charge Control Enable

9—

Exposed Thermal Pad (EP); must be connected to VSS.

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