CAM35C44 datasheet(35/50 Pages) SMSC

35 / 50 page

GPIOA Data Register

The GPIOA Data register GP02 contains the

data bits for the five general purpose I/O pins

(TABLE 32).

The state of a GPIO pin can be

forced to the value contained its data register, or

the value in the data register can reflect the state

of the pin, depending on the state of the

direction and enable bits.

The affects of the

GPx_DAT bits are summarized in TABLE 30.

GP02 can be accessed both in the configuration

state and the run state (see section REGISTER

ADDRESS MAP on page 16 and TABLE 29).

The default value of the GPIOA Data register

after power up is 00H. Bits[7:5] in the GPIOA

Data register are RESERVED.

TABLE 32 - GPIOA DATA REGISTER

DEFAULT

GP02

R/W

RESERVED

GP4_

DAT

GP3_

DAT

GP2_

DAT

GP1_

DAT

GP0_

DAT

0x00

GPIOA Direction Register

The GPIOA Direction register GP04 contains the

direction bits for the five general purpose I/O

pins (TABLE 33). The direction of a GPIO pin

depends upon the state of the direction bit and

the enable bit, but typically if the direction bit is

“1” the GPIO pin is an output; if the direction bit

“0”

the

GPIO

input.

The

affects

the

GPx_OUT

bits

are

summarized

TABLE

33.

GP04

can

accessed both in the configuration state and the

run state (see section REGISTER ADDRESS

MAP on page 16 and TABLE 29). The default

value of the GPIOA Direction register after

power up is 00H.

Bits[7:5] in the GPIOA

Direction register are RESERVED.

TABLE 33 - GPIOA DIRECTION REGISTER

DEFAULT

GP04

R/W

RESERVED

GP4_

OUT

GP3_

OUT

GP2_

OUT

GP1_

OUT

GP0_

OUT

0x00

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