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CDP68HC68P1 데이터시트(PDF) 3 Page - Intersil Corporation

부품명 CDP68HC68P1
상세설명  CMOS Serial 8-Bit Input/Output Port
PDF  9 Pages
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제조업체  INTERSIL [Intersil Corporation]
홈페이지  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CDP68HC68P1 데이터시트(HTML) 3 Page - Intersil Corporation

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3
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . . . -0.5V to +7V
(Voltage Referenced to VSS Terminal)
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to VDD +0.5V
DC Input Current, Any One Input
. . . . . . . . . . . . . . . . . . . . . . . .±10mA
Power Dissipation Per Package (PD)
TA = -40
oC to 60oC (Package Type E) . . . . . . . . . . . . . . .500mW
TA = 60
oC to 85oC (Package Type E)
Derate Linearly at . . . . . . . . . . . . . . . . . . . . . 12mW/oC to 200mW
TA = -40
oC to 60oC (Package Type M) (Note 1) . . . . . . . .300mW
TA = 60
oC to 85oC (Package Type M) (Note 1)
Derate Linearly at . . . . . . . . . . . . . . . . . . . . . . 5mW/oC to 175mW
Operating Conditions
Temperature Range (TA)
Package Type E, M . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 85oC
DC Operating Voltage Range . . . . . . . . . . . . . . . . . 3V Min, 6V Max
Serial Clock Frequency, fSCK, VDD = 3V. . . . . . . . . . .1.05MHz Max
Serial Clock Frequency, fSCK, VDD = 4.5V . . . . . . . . . .2.1MHz Max
Input Voltage Range, VIH . . . . . . . . . . . . . . . . . . . . VDD +0.3V Max
Input Voltage Range, VIL . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V Min
Thermal Resistance (Typical, Note 2)
θJA (oC/W) θJC (oC/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
90
NA
SOIC Package . . . . . . . . . . . . . . . . . . .
110
NA
Device Dissipation Per Output Transistor . . . . . . . . . . . . . . . 100mW
TA = Full Package Temperature Range (All Package Types)
Maximum Storage Temperature Range (TSTG) . . . -65
oC to 150oC
Maximum Lead Temperature (Soldering 10s)
At Distance 1/16in
± 1/32in. (1.59 ± 0.79mm) . . . . . . . . . . .265oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Printed circuit board mount: 57mm x 57mm minimum area x 1.6mm thick G10 epoxy glass, or equivalent.
2.
θ
JA is measured with the component mounted on an evaluation PC board in free air.
Static Electrical Specifications TA = -40oC to 85oC, VDD = 3.3V ±10%, Unless Otherwise Specified.
PARAMETER
SYMBOL
TEST
CONDITIONS
MIN
(NOTE 3)
TYP
MAX
UNITS
Output Voltage
VOH
IOH = -0.4mA, VDD = 3V
2.7
-
-
V
VOL
IOL = 0.4mA, VDD = 3V
-
-
0.3
V
Input Voltage
D0 - D7
Positive Trigger Threshold
VP
1.85
-
2.4
V
Negative Trigger Threshold
VN
0.85
-
1.35
V
Hysteresis
VIH
0.85
-
1.25
V
Input Voltage
ID0, ID1, MOSI, SCK, CE
Positive Trigger Threshold
VP
1.3
-
1.9
V
Negative Trigger Threshold
VN
0.8
-
1.2
V
Hysteresis
VIH
0.5
-
0.95
V
Input Leakage Current
IIN
--
±1µA
Standby Device Current
IDDS
-1
15
µA
Three-State Output Leakage Current
IOUT
--
±10
µA
Operating Device Current (Note 4)
IOPER
VIN = VIL, VIH
-0.1
1
mA
Input Capacitance
CIN
VIN = 0V, f = 1MHz, TA = 25
oC-
4
6
pF
NOTES:
3. Typical values are for TA = 25
oC and nominal V
DD.
4. Outputs open circuited; cycle time = Min. tCYCLE, duty = 100%.
CDP68HC68P1



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