SC16C652 datasheet(13/41 Pages) PHILIPS

13 / 41 page

Philips Semiconductors

SC16C652

Dual UART with 32 bytes of transmit and receive FIFOs

Product data

Rev. 04 — 20 June 2003

13 of 41

9397 750 11634

their normal modem control inputs pins, and instead are connected internally to RTS,

DTR, MCR[3] (OP2) and MCR[2] (OP1). Loop-back test data is entered into the

transmit holding register via the user data bus interface, D0-D7. The transmit UART

serializes the data and passes the serial data to the receive UART via the internal

loop-back connection. The receive UART converts the serial data back into parallel

data that is then made available at the user data interface D0-D7. The user optionally

compares the received data to the initial transmitted data for verifying error-free

operation of the UART TX/RX circuits.

In this mode, the receiver and transmitter interrupts are fully operational. The Modem

Control Interrupts are also operational.

Fig 4.

Internal loop-back mode diagram.

TRANSMIT

FIFO

TXA, TXB

RECEIVE

SHIFT

RECEIVE

FIFO

RXA, RXB

SC16C652

TRANSMIT

SHIFT

MODEM

CONTROL

LOGIC

CLOCK AND

BAUD RATE

GENERATOR

XTAL2

XTAL1

DATA BUS

AND

CONTROL LOGIC

D0–D7

IOR

IOW

RESET

A0–A2

CSA, CSB

SELECT

LOGIC

INTA, INTB

TXRDYA, TXRDYB

RXRDYA, RXRDYB

INTERRUPT

CONTROL

LOGIC

002aaa350

MCR[4] = 1

CTSA, CTSB

RTSA, RTSB

DSRA, DSRB

DTRA, DTRB

RIA, RIB

(OP1A, OP1B)

CDA, CDB

(OP2A, OP2B)

SC16C652 데이터시트(PDF) 13 Page - NXP Semiconductors

SC16C652 데이터시트(HTML) 13 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41

데이터시트 다운로드

링크 URL