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©2016 Integrated Device Technology, Inc

Revision B March 17, 2016

83918 Data Sheet

Table 1. Pin Descriptions

NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Number

Name

Type

Description

1, 2, 12, 17, 25

GND

Power

Power supply ground.

3

LVCMOS_CLK

Input

Pulldown

Single-ended clock input. LVCMOS/LVTTL interface levels.

4

CLK_SEL

Input

Pulldown

Clock select pin. When HIGH, selects LVCMOS_CLK. When LOW,

selects crystal inputs. LVCMOS/LVTTL interface levels.

5,

6

XTAL_IN,

XTAL_OUT

Input

Crystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the

output.

Power

Positive supply pin.

8, 16, 21, 29

Power

Output supply pins.

9, 10, 11,

13, 14, 15,

18, 19, 20, 22,

23, 24, 26, 27,

28, 30, 31, 32

Q17, Q16, Q15,

Q14, Q13, Q12,

Q11, Q10, Q9, Q8,

Q7, Q6, Q5, Q4,

Q3, Q2,Q1, Q0

Output

Single-ended clock outputs. LVCMOS/LVTTL interface levels.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

Input Capacitance

4pF

Power Dissipation Capacitance

(per output)

9

pF

8

pF

8

pF

51

k



Output Impedance

18

19

20



20

22

24



25

29

34

