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LPS22HB 데이터시트(PDF) 23 Page - STMicroelectronics |
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LPS22HB 데이터시트(HTML) 23 Page - STMicroelectronics |
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23 / 49 page ![]() DocID027083 Rev 5 23/49 LPS22HB FIFO 49 5.7 Bypass-to-FIFO mode In Bypass-to-FIFO mode (FIFO_CTRL (14h)(FMODE2:0) = '111'), data measurement storage inside FIFO operates in FIFO mode when INT_SOURCE(IA) is equal to '1', otherwise FIFO content is reset (Bypass mode). An interrupt generator can be set to the desired configuration through INTERRUPT_CFG (0Bh). The INTERRUPT_CFG (0Bh) (LIR) bit should be set to '1' in order to have latched interrupt. Figure 13. Bypass-to-FIFO mode 5.8 Retrieving data from FIFO FIFO data is read from PRESS_OUT (Addr. reg 28h,29h,2Ah) and TEMP_OUT (Addr. reg 2Bh,2Ch). Each time data is read from the FIFO, the oldest data are placed in the PRESS_OUT_XL (28h), PRESS_OUT_L (29h), PRESS_OUT_H (2Ah), TEMP_OUT_L (2Bh) and TEMP_OUT_H (2Ch) registers and both single-read and read-burst operations can be used. The device automatically updates the reading address and it rolls back to 28h when register 2Ch is reached. In order to read all FIFO levels in multiple byte reading, 160 bytes (5 output registers by 32 levels) must be read. |
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