TSZ121ILT datasheet(17/38 Pages) STMICROELECTRONICS

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TSZ121, TSZ122, TSZ124

Application information

DocID023563 Rev 5

17/38

Application information

5.1

Operation theory

The TSZ121, TSZ122, and TSZ124 are high precision CMOS devices. They achieve a low

offset drift and no 1/f noise thanks to their chopper architecture. Chopper-stabilized amps

constantly correct low-frequency errors across the inputs of the amplifier.

Chopper-stabilized amplifiers can be explained with respect to:

Time domain

Frequency domain

5.1.1

Time domain

The basis of the chopper amplifier is realized in two steps. These steps are synchronized

thanks to a clock running at 400 kHz.

Figure 38: Block diagram in the time domain (step 1)

Figure 39: Block diagram in the time domain (step 2)

Figure 38: "Block diagram in the time domain (step 1)" shows step 1, the first clock cycle,

where Vio is amplified in the normal way.

Figure 39: "Block diagram in the time domain (step 2)" shows step 2, the second clock

cycle, where Chop1 and Chop2 swap paths. At this time, the Vio is amplified in a reverse

way as compared to step 1.

At the end of these two steps, the average Vio is close to zero.

The A2(f) amplifier has a small impact on the Vio because the Vio is expressed as the input

offset and is consequently divided by A1(f).

In the time domain, the offset part of the output signal before filtering is shown in Figure 40:

"Vio cancellation principle".

TSZ121ILT 데이터시트(PDF) 17 Page - STMicroelectronics