iPEM

16 Mb ASYNC SRAM

AS8SLC512K32PECA

AS8SLC512K32PECA

Rev. 0.2 03/11

Micross Components reserves the right to change products or specifications without notice.

3

AC CHARACTERISTICS READ CYCLE

JEDEC

Alt.

Min

Max

Min

Max

Min

Max

Min

Max

Read Cycle Time

12

15

20

25

ns

Address Access Time

12

15

20

25

ns

Chip Enable Access

12

15

20

25

ns

Chip Enable to Output in Low Z

2222

ns

Chip Disable to Output in High Z

6799

ns

Output Hold from Address Change

2222

ns

Output Enable to Output Valid

6799

ns

Output Enable to Output in Low Z

0000

ns

Output Enable to Output in High Z

6799

ns

25ns

Units

Parameter

Symbol

12ns

15ns

20ns

READ CYCLE 1 - W\ HIGH, G\, E\ LOW

ADDRESS 1

ADDRESS 2

DATA 1

DATA 2

A

Q

READ CYCLE 2 - W\ HIGH

E#

G#

Q

A