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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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WM8281ECS/R 데이터시트(PDF) 203 Page - Cirrus Logic |
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WM8281ECS/R 데이터시트(HTML) 203 Page - Cirrus Logic |
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203 / 392 page  WM8281 Rev 4.0 203 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 8 SPK2_MUTE_EN DIAN 0 PDM Speaker Output 2 Mute Sequence Control 0 = Mute sequence is LSB first 1 = Mute sequence output is MSB first 7:0 SPK2_MUTE_SE Q [7:0] 69h PDM Speaker Output 2 Mute Sequence Defines the 8-bit code that is output on SPKDAT2 (left) or SPKDAT2 (right) when muted. R1171 (0493h) PDM SPK2 CTRL 2 0 SPK2_FMT 0 PDM Speaker Output 2 timing format 0 = Mode A (PDM data is valid at the rising/falling edges of SPKCLK2) 1 = Mode B (PDM data is valid during the high/low phase of SPKCLK2) Table 74 Digital Speaker (PDM) Output Control The digital speaker (PDM) outputs SPKDATn and SPKCLKn are intended for direct connection to a compatible external speaker driver. A typical configuration is illustrated in Figure 60. WM8281 Speaker Driver Speaker Driver Right Left Speaker Driver Speaker Driver Left Right SPKCLK1 SPKDAT1 SPKCLK2 SPKDAT2 Figure 60 Digital Speaker (PDM) Connection |
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