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LM4752TS 데이터시트(PDF) 13 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 LM4752TS
상세설명  Stereo 11W Audio Power Amplifier
PDF  18 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM4752TS 데이터시트(HTML) 13 Page - National Semiconductor (TI)

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Application Information (Continued)
TO-263 HEATSINK DESIGN EXAMPLES:
Example 1: (Stereo Single-Ended Output)
Given:
T
A=30˚C
T
J=150˚C
R
L=4Ω
V
S=12V
θ
JC=2˚C/W
P
DMAX from PD vs PO Graph:
P
DMAX ≈ 3.7W
Calculating P
DMAX:
P
DMAX = VCC
2 /(
π2R
L) = (12V)
2 /
π2(4Ω)) = 3.65W
Calculating Heatsink Thermal Resistance:
θ
SA < [(T J −TA)/PDMAX]− θJC − θCS
θ
SA < 120˚C / 3.7W − 2.0˚C/W − 0.2˚C/W = 30.2˚C/W
Therefore the recommendation is to use 1.5 x 1.5 square
inch of single-sided copper clad.
Example 2: (Stereo Single-Ended Output)
Given:
T
A=50˚C
T
J=150˚C
R
L=4Ω
V
S=12V
θ
JC=2˚C/W
P
DMAX from PD vs PO Graph:
P
DMAX ≈ 3.7W
Calculating P
DMAX:
P
DMAX = VCC
2 /(
π2R
L) = (12V)
2 /(
π2(4Ω)) = 3.65W
Calculating Heatsink Thermal Resistance:
θ
SA < [(TJ −TA)/PDMAX]− θJC − θCS
θ
SA < 100˚C / 3.7W − 2.0˚C/W − 0.2˚C/W = 24.8˚C/W
Therefore the recommendation is to use 2.0 x 2.0 square
inch of single-sided copper clad.
Example 3: (Bridged Output)
Given:
T
A=50˚C
T
J=150˚C
R
L=8Ω
V
S=12V
θ
JC=2˚C/W
Calculating P
DMAX:
P
DMAX = 4[VCC
2 /(2
π2R
L)] = 4(12V)
2 /(2
π2(8Ω)) = 3.65W
Calculating Heatsink Thermal Resistance:
θ
SA < [(TJ −TA)/PDMAX]− θJC − θCS
θ
SA < 100˚C / 3.7W − 2.0˚C/W − 0.2˚C/W = 24.8˚C/W
Therefore the recommendation is to use 2.0 x 2.0 square
inch of single-sided copper clad.
Layout and Ground Returns
Proper PC board layout is essential for good circuit perfor-
mance. When laying out a PC board for an audio power am-
plifer, particular attention must be paid to the routing of the
output signal ground returns relative to the input signal and
bias capacitor grounds. To prevent any ground loops, the
ground returns for the output signals should be routed sepa-
rately and brought together at the supply ground. The input
signal grounds and the bias capacitor ground line should
also be routed separately. The 0.1 µF high frequency supply
bypass capacitor should be placed as close as possible to
the IC.
www.national.com
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