82801AB datasheet(49/414 Pages) INTEL

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82801AA and 82801AB Datasheet

4-1

Clock Domains

Table 4-1 shows the system clock domains. Figure 4-1 shows the assumed connection of the

various system components, including the clock generator. For complete details of the system

clocking solution, refer to the system’s clock generator component specification.

Table 4-1. ICH and System Clock Domains

Clock Domain

Frequency

Source

Usage

ICH CLK66

66 MHz

Main Clock

Generator

Hub Interface. Shut off during S3 or below.

ICH PCICLK

33 MHz

Main Clock

Generator

PCI Clock. This clock remains on during S0 state, but can

be shut off during S3 or below.

System PCI

33 MHz

Main Clock

Generator

PCI Bus, LPC interface. These only go to external PCI and

LPC devices.

ICH USB

48 MHz

Main Clock

Generator

USB Controller.

ICH CLK14

14.31818 MHz

Main Clock

Generator

Used for ACPI timer

ICH AC’97

12.288 MHz

AC’97 Codec

AC’97 Link. Generated by AC’97 CODEC

RTC

32.768 kHz

ICH

RTC, Power Management. ICH has its own oscillator.

ICH APIC

16.667 MHz

Main Clock

Generator

Used for ICH-CPU interrupt messages.

Figure 4-1. Conceptual System Clock Diagram

I/O Controller

Hub

Clock

Generator

Hub Interface (66 MHz)

PCI (33 MHz)

APIC CLK

14.31818 MHz

48 MHz

32 kHz

XTAL

SUSCLK (32 kHz)

(ICH: 82801AA only)

Clock

Outputs

82801AB 데이터시트(PDF) 49 Page - Intel Corporation

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