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SL28PCIe25ALIT 데이터시트(PDF) 13 Page - Silicon Laboratories |
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SL28PCIe25ALIT 데이터시트(HTML) 13 Page - Silicon Laboratories |
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13 / 17 page ![]() SL28PCIe25 DOC#: SP-AP-0776 (Rev. 0.2) Page 13 of 16 Test and Measurement Set-up For Reference Clock The following diagram shows the test load configurations for the single-ended REF output signal. For Differential Clock Signals This diagram shows the test load configuration for the differential clock signals Figure 3. Single-ended REF Triple Load Configuration 50 15 Measurement Point 4 pF 50 15 Measurement Point 4 pF 50 REF L2=8" L2=8" L2=8" 15 Measurement Point 4 pF L1=<0.5" L1=<0.5" L1=<0.5" Figure 4. Single-ended Output Signals (for AC Parameters Measurement) Figure 5. 0.7V Differential Load Configuration |
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