ADA4522-4ARZ-R7 datasheet(20/32 Pages) AD

부품명	ADA4522-4ARZ-R7

상세설명	55 V, EMI Enhanced, Zero Drift, Ultralow Noise, Rail-to-Rail Output Operational Amplifiers

PDF	32 Pages

Scroll/Zoom	100%

제조업체	AD [Analog Devices]

홈페이지	http://www.analog.com

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20 / 32 page

ADA4522-1/ADA4522-2/ADA4522-4

Data Sheet

Rev. E | Page 20 of 32

TIME (2µs/DIV)

VSY = ±2.5V

RL = 10kΩ

CL = 50pF

DUT AV = –1

INPUT

OUTPUT

+10mV

–10mV

+1V

–1V

ERROR BAND

POST GAIN = 10

Figure 66. Negative Settling Time to 0.1%, VSY = ±2.5 V

TIME (4µs/DIV)

VSY = ±15V AND ±27.5V

RL = 10kΩ

CL = 50pF

DUT AV = –1

INPUT

OUTPUT

+50mV

–50mV

ERROR BAND

POST GAIN = 10

+5V

–5V

Figure 67. Negative Settling Time to 0.1%, VSY = ±15 V and ±27.5 V

100

10k

100k

10M

FREQUENCY (Hz)

RL = 10kΩ

AV = –1

VIN = ±26V

VSY = ±27.5V

VIN = ±13.5V

VSY = ±15V

VIN = ±1V

VSY = ±2.5V

Figure 68. Output Voltage Swing vs. Frequency

TIME (2µs/DIV)

VSY = ±2.5V

RL = 10kΩ

CL = 50pF

DUT AV = –1

INPUT

OUTPUT

+10mV

–10mV

ERROR BAND

POST GAIN = 10

+1V

–1V

Figure 69. Positive Settling Time to 0.1%, VSY = ±2.5 V

TIME (4µs/DIV)

VSY = ±15V AND ±27.5V

RL = 10kΩ

CL = 50pF

DUT AV = –1

INPUT

OUTPUT

+50mV

–50mV

ERROR BAND

POST GAIN = 10

+5V

–5V

Figure 70. Positive Settling Time to 0.1%, VSY = ±15 V and ±27.5 V

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