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ADF4355-2 데이터시트(PDF) 7 Page - Analog Devices

부품명 ADF4355-2
상세설명  Programmable output power level
PDF  38 Pages
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ADF4355-2 데이터시트(HTML) 7 Page - Analog Devices

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ADF4355-2
Data Sheet
Rev. B | Page 6 of 37
TIMING CHARACTERISTICS
AVDD = DVDD =VRF = 3.3 V ± 5%, 4.75 V ≤ VP = VVCO ≤ 5.25 V, AGND = CPGND = AGNDVCO = SDGND = AGNDRF = 0 V, RSET = 5.1 kΩ, dBm
referred to 50 Ω, TA = TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter
Limit
Unit
Description
fCLK
50
MHz max
Serial peripheral interface CLK frequency
t1
10
ns min
LE setup time
t2
5
ns min
DATA to CLK setup time
t3
5
ns min
DATA to CLK hold time
t4
10
ns min
CLK high duration
t5
10
ns min
CLK low duration
t6
5
ns min
CLK to LE setup time
t7
20 or (2/fPFD), whichever is longer
ns min
LE pulse width
Timing Diagram
CLK
DATA
LE
DB31 (MSB)
DB30
DB1
(CONTROL BIT C2)
DB0 (LSB)
(CONTROL BIT C1)
t1
t2
t3
t7
t6
t4
t5
DB2
(CONTROL BIT C3)
DB3
(CONTROL BIT C4)
Figure 2. Timing Diagram



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