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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ADF4355BCPZ 데이터시트(PDF) 34 Page - Analog Devices |
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ADF4355BCPZ 데이터시트(HTML) 34 Page - Analog Devices |
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34 / 36 page  Data Sheet ADF4355 Rev. A | Page 33 of 35 POWER SUPPLIES The ADF4355-2 contains four multiband VCOs that cover an octave range of frequencies. To ensure best performance, it is vital to connect a low noise regulator, such as the ADM7170, to the VVCO pin. Connect the same regulator to package pins VVCO, VREGVCO, and VP. For the 3.3 V supply pins, use two ADM7170 regulators, one for the DVDD and AVDD supplies and one for VRF. Figure 45 shows the recommended connections. PRINTED CIRCUIT BOARD (PCB) DESIGN GUIDELINES FOR A CHIP-SCALE PACKAGE The lands on the 32-lead lead frame chip-scale package are rectangular. The PCB pad for these lands must be 0.1 mm longer than the package land length and 0.05 mm wider than the package land width. Center each land on the pad to maximize the solder joint size. The bottom of the chip-scale package has a central exposed thermal pad. The thermal pad on the PCB must be at least as large as the exposed pad. On the PCB, there must be a minimum clearance of 0.25 mm between the thermal pad and the inner edges of the pad pattern. This clearance ensures the avoidance of shorting. To improve the thermal performance of the package, use thermal vias on the PCB thermal pad. If vias are used, incorporate them into the thermal pad at the 1.2 mm pitch grid. The via diameter must be between 0.3 mm and 0.33 mm and the via barrel must be plated with 1 oz. of copper to plug the via. For a microwave PLL and VCO synthesizer, such as the ADF4355, take care with the board stack-up and layout. Do not consider using FR4 material because it is too lossy above 3 GHz. Instead, Rogers 4350, Rogers 4003, or Rogers 3003 dielectric material is suitable. Take care with the RF output traces to minimize discontinuities and ensure the best signal integrity. Via placement and grounding are critical. 1500pF 390pF 33nF 3.3kΩ 1kΩ ADF4355 VVCO CPGND AGND RFOUTB– RFOUTB+ CPOUT 1nF 1nF 4.7kΩ RSET LE DATA CLK FREFIN VTUNE DVDD AVDD CE MUXOUT 16 27 17 29 1 2 3 22 8 31 9 13 18 21 LOCK DETECT AGNDRF AGNDVCO 14 15 19 23 24 25 30 10 20 7 PDBRF 26 SDGND 6 32 VP 5 AVDD 10pF 0.1µF 10pF 0.1µF 10pF 0.1µF 4 RFOUTA– RFOUTA+ 12 11 7.5nH 7.5nH 1nF 1nF COUT 10µF CIN 10µF VOUT = 5.0V VIN = 6.0V OFF ON VOUT VRF 100nF 100nF 1nF 1nF FREFIN 28 COUT 10µF CIN 10µF VOUT = 3.3V VIN = 6.0V VOUT SS VIN GND EN OFF ON ADM7170 CSS 1nF VOUT SS VIN GND EN ADM7170 REFINA REFINB VREGVCO VBIAS CREG2 CREG1 VREF COUT 10µF CIN 10µF VOUT = 3.3V VIN = 6.0V VOUT SS VIN GND EN OFF ON ADM7170 CSS 1nF CSS 1nF SENSE VOUT VOUT VOUT SENSE SENSE Figure 45. ADF4355 Power Supplies |
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