SN74LVC2G53

SINGLEPOLE DOUBLETHROW (SPDT) ANALOG SWITCH OR

2:1 ANALOG MULTIPLEXER/DEMULTIPLEXER

SCES324K − JULY 2001 − REVISED SEPTEMBER 2003

2

POST OFFICE BOX 655303

FUNCTION TABLE

CONTROL

INPUTS

ON

CHANNEL

INH

A

CHANNEL

L

L

Y1

L

HY2

H

X

None

logic diagram (positive logic)

Y2

A

INH

Y1

COM

5

2

7

6

1

SW

SW

NOTE A: For simplicity, the test conditions shown in Figures 1 through 4 and 6 through 10 are for the demultiplexer configuration. Signals can

be passed from COM to Y1 (Y2) or from Y1 (Y2) to COM.

simplified schematic, each switch (SW)

COM

Y