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74LVC2G17 데이터시트(PDF) 11 Page - Integrated Circuit Systems

부품명 74LVC2G17
상세설명  Dual non-inverting Schmitt-trigger with 5 V tolerant input
PDF  16 Pages
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제조업체  ICST [Integrated Circuit Systems]
홈페이지  http://www.icst.com
Logo ICST - Integrated Circuit Systems

74LVC2G17 데이터시트(HTML) 11 Page - Integrated Circuit Systems

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2003 Aug 13
11
Philips Semiconductors
Product specification
Dual non-inverting Schmitt-trigger with
5 V tolerant input
74LVC2G17
AC WAVEFORMS
handbook, halfpage
MNB072
nA input
nY output
tPLH
tPHL
GND
VI
VM
VM
VM
VM
VOH
VOL
Fig.8 The input (nA) to output (nY) propagation delays and the output transition times.
VOL and VOH are typical output voltage drop that occur with the output load.
VCC
VM
INPUT
VI
tr =tf
1.65 to 1.95 V 0.5
× V
CC
VCC
≤ 2.0 ns
2.3 to 2.7 V
0.5
× VCC
VCC
≤ 2.0 ns
2.7 V
1.5 V
2.7 V
≤ 2.5 ns
3.0 to 3.6 V
1.5 V
2.7 V
≤ 2.5 ns
4.5 to 5.5 V
0.5
× V
CC
VCC
≤ 2.5 ns
handbook, full pagewidth
VEXT
VCC
VI
VO
MNA616
D.U.T.
CL
RT
RL
RL
PULSE
GENERATOR
Fig.9 Load circuitry for switching times.
Definitions for test circuit:
RL = Load resistor.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VCC
VI
CL
RL
VEXT
tPLH/tPHL
tPZH/tPHZ
tPZL/tPLZ
1.65 to 1.95 V
VCC
30 pF
1 k
Ω
open
GND
2
× V
CC
2.3 to 2.7 V
VCC
30 pF
500
Ω
open
GND
2
× V
CC
2.7 V
2.7 V
50 pF
500
Ω
open
GND
6 V
3.0 to 3.6 V
2.7 V
50 pF
500
Ω
open
GND
6 V
4.5 to 5.5 V
VCC
50 pF
500
Ω
open
GND
2
× V
CC



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