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LM9812 데이터시트(PDF) 17 Page - National Semiconductor (TI) |
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LM9812 데이터시트(HTML) 17 Page - National Semiconductor (TI) |
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17 / 37 page ![]() 17 http://www.national.com Diagram 20: Digital Data Timing, output data and coefficient data on same bus, two clocks (OCLK and GCLK) for coefficient data, OCLK and GCLK input to LM9812, OCLK and GLCK phase = 0°. EOC CD0-CD9 tSETUP tHOLD tSETUP tHOLD R Gainn R Offsetn G Gainn G Offsetn B Gainn-1 tGCLK-EOC (GCLK IN) tOCLK-EOC 1 (OCLK IN) B Output Datan-1 G Output Datan-1 D0-D9 R Outn GCLK (to LM9812) OCLK (to LM9812) Diagram 21: Digital Data Timing, output data and coefficient data on same bus, two clocks (OCLK and GCLK) for coefficient data, OCLK and GCLK input to LM9812, OCLK and GLCK phase = 180°. EOC CD0-CD9 tSETUP tHOLD tSETUP tHOLD G Gainn G Offsetn B Gainn B Offsetn R Gainn-1 tGCLK-EOC (GCLK IN) tOCLK-EOC 1 (OCLK IN) B Output Datan-1 G Output Datan-1 D0-D9 R Outn GCLK (to LM9812) OCLK (to LM9812) Diagram 22: RD PIXEL Output Timing (Data Read Phase = 0°) DATA (INTERNAL) EOC D0-D9 Green Output Datan-1 B Output Datan-1 RD PIXEL Bn-1 tDATAVALID tDACC tD1H, tD0H Green Internal Datan-1 Blue Internal Datan-1 |
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