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LMC6582 데이터시트(PDF) 7 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
부품명 LMC6582
상세설명  Low Voltage, Rail-To-Rail Input and Output CMOS Operational Amplifier
PDF  19 Pages
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제조업체  NSC [National Semiconductor (TI)]
홈페이지  http://www.national.com
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AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J = 25˚C, V
+ = 3V, V= 0V, V
CM = VO = V
+/2 and R
L > 1MΩ. Bold-
face limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Typ
(Note 5)
LMC6582AI
LMC6582BI
Units
LMC6584AI
LMC6584BI
Limit
Limit
(Note 6)
(Note 6)
SR
Slew Rate
(Note 8)
1.2
0.7
0.7
V/µs
min
0.55
0.55
V
+ = 10V, (Note 10)
1.2
0.7
0.7
0.55
0.55
GBW
Gain-Bandwidth Product
1.2
MHz
φ
m
Phase Margin
50
Deg
G
m
Gain Margin
12
dB
Amp-to-Amp Isolation
V
+ = 10V (Note 9)
130
dB
e
n
Input-Referred
f = 1 kHz
30
Voltage Noise
V
CM = 0.5V
i
n
Input-Referred
f = 1 kHz
0.5
Current Noise
T.H.D.
Total Harmonic Distortion
f = 1 kHz, A
V = +1
0.01
%
R
L = 10 kΩ,VO = 2Vp-p
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which the device is in-
tended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the electrical characteristics.
Note 2: Human body model, 1.5 k
Ω in series with 100 pF.
Note 3: Applies to both single-supply and split-supply operation. Continous short circuit operation at elevated ambient temperature can result in exceeding the maxi-
mum allowed junction temperature of 150˚C. Output current in excess of ±30 mA over long term may adversely affect reliability.
Note 4: The maximum power dissipation is a function of TJ (max), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max)
−TA)/θJA. All numbers apply for packages soldered directly into a PC board.
Note 5: Typical Values represent the most likely parametric norm.
Note 6: All limits are guaranteed by testing or statistical analysis.
Note 7: V+ = 3V, VCM = 0.5V. For sourcing and sinking, 0.5V ≤ VO ≤ 2.5V.
Note 8: V+ = 3V. Connected as Voltage Follower with 2V step input, and output is measured from 0.8V to 2.2V. Number specified is the slower of the positive or nega-
tive slew rates.
Note 9: Input referred, V+ = 10V, and RL = 100 kΩ connected to 5V. Each amp excited in turn with 1 kHz to produce VO = 2VPP.
Note 10: V+ = 10V. Connected as voltage follower with 8V step Input, and output is measured from 2V to 8V. Number specified is the slower of the positive or nega-
tive slew rates.
Note 11: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.
Note 12: Guaranteed limits are dictated by tester limitations and not device performance. Actual performance is reflected in the typical value.
Note 13: CMRR+ and CMRRare tested, and the number indicated is the lower of the two values. For CMRR+,V+/2 < VCM < V
+ for 1.8V, 2.2V, 3V, 5V, and 10V.
For CMRR,0 < VCM < V
+/2 for 3V, 5V and 10V. For 1.8V and 2.2V, 0.25 < V
CM < V
+ −0.3.
Note 14: V+ = 10V, VCM = 0.5V. For Sourcing tests, 1V ≤ VO ≤ 5V. For Sinking tests, 5V ≤ VO ≤ 9V.
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