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LINR2 데이터시트(PDF) 4 Page - fujitsu semiconductor |
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LINR2 데이터시트(HTML) 4 Page - fujitsu semiconductor |
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4 / 108 page ![]() MB96320 Series 4 FME-MB96320 rev 7 Real Time Clock • Can be clocked either from sub oscillator (devices with part number suffix “W”), main oscillator or from the RC oscillator • Facility to correct oscillation deviation of Sub clock or RC oscillator clock (clock calibration) • Read/write accessible second/minute/hour registers • Can signal interrupts every half second/second/minute/hour/day • Internal clock divider and prescaler provide exact 1s clock External Interrupts • Edge sensitive or level sensitive • Interrupt mask and pending bit per channel • Each available CAN channel RX has an external interrupt for wake-up • Selected USART channels SIN have an external interrupt for wake-up Non Maskable Interrupt • Disabled after reset • Once enabled, can not be disabled other than by reset. • Level high or level low sensitive • Pin shared with external interrupt 0. External bus interface • 8-bit or 16-bit bidirectional data • Up to 24-bit addresses • 6 chip select signals • Multiplexed address/data lines • Wait state request • External bus master possible • Timing programmable I/O Ports • Virtually all external pins can be used as general purpose I/O • All push-pull outputs (except when used as I2C SDA/SCL line) • Bit-wise programmable as input/output or peripheral signal • Bit-wise programmable input enable • Bit-wise programmable input levels: Automotive / CMOS-Schmitt trigger / TTL • Bit-wise programmable pull-up resistor • Bit-wise programmable output driving strength for EMI optimization Package • 80-pin plastic LQFP Feature Description |
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