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WM8772EFT/R 데이터시트(PDF) 33 Page - Wolfson Microelectronics plc

부품명 WM8772EFT/R
상세설명  24 BIT 192KHZ 6 CHANNEL CODEC WITH VOLUME CONTROL
PDF  70 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8772EFT/R 데이터시트(HTML) 33 Page - Wolfson Microelectronics plc

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Production Data
WM8772EDS – 28 PIN SSOP
w
PD Rev 4.1 October 2004
33
POWERDOWN MODE AND ADC/DAC DISABLE
Setting the PDWN register bit immediately powers down the DAC’s on the WM8772EDS, overriding
the DACD powerdown bits control bits. All trace of the previous input samples are removed, but all
control register settings are preserved. When PDWN is cleared the digital filters will be reinitialised
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0000010
Powerdown Control
2
PDWN
0
Power Down all DAC’s Select:
0: All DAC’s enabled
1: All DAC’s disabled
The ADC and DACs may also be powered down individually by setting the ADCPD and DACPD
disable bits. Setting ADCD will disable the ADC and select a low power mode. The ADC digital filters
will be reset and will reinitialise when ADCPD is unset. Each Stereo DAC channel has a separate
disable DACPD[2:0]. Setting DACPD for a channel will disable the DACs and select a low power
mode.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0
ADCPD
0
ADC Disable:
0: Active
1: Disable
0001010
Powerdown Control
3:1
DACPD[2:0]
000
DAC Disable
DACPD [2:0]
DAC CHANNEL 1
DAC CHANNEL 2
DAC CHANNEL 3
000
Active
Active
Active
001
DISABLE
Active
Active
010
Active
DISABLE
Active
011
DISABLE
DISABLE
Active
100
Active
Active
DISABLE
101
DISABLE
Active
DISABLE
110
Active
DISABLE
DISABLE
111
DISABLE
DISABLE
DISABLE
MASTER POWERDOWN
This control bit powers down the references for the whole chop. Therefore for complete powerdown,
both the ADC and DACs should be powered down first before setting this bit.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0001010
Interface Control
4
PWRDNALL
0
Master Power Down Bit:
0: Not powered down
1: Powered down
MASTER MODE SELECT
Control bit MS selects between audio interface Master and Slave Modes. In Master mode LRC and
BCLK are outputs and are generated by the WM8772EDS. In Slave mode LRC and BCLK are inputs
to WM8772EDS.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0001010
Interface Control
5
MS
0
DAC Audio Interface Master/Slave
Mode Select:
0: Slave mode
1: Master mode



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