SSD1828 datasheet(18/43 Pages) ETC

18 / 43 page

SSD1828

Rev 1.10

07/2002

SOLOMON

Figure 4 - Oscillator Circuitry

7.8

LCD Driving Voltage Generator and Regulator

This module generates the LCD voltage needed for display output. It takes a single supply input

and generates necessary bias voltages.

It consists of:

2X, 3X, 4X and 5X DC-DC voltage converter

Bias Divider

If the output op-amp buffer option in Set Power Control Register command is enabled, this circuit

block will divide the regulator output (Vout) to give the LCD driving levels (VL2 - VL5).

The divider does not require external capacitors to reduce the external hardware and pin counts.

Contrast Control

Software control of 64 voltage levels of LCD voltage.

Bias Ratio Selection circuitry

Software control of 1/4 to 1/9 bias ratio to match the characteristic of LCD panel.

Self adjust temperature compensation circuitry

Provide 4 different compensation grade selections to satisfy the various liquid crystal temperature

grades. The grading can be selected by software control. Defaulted temperature coefficient

(PTC3) value is -0.05%/°C.

7.9

161 Bit Latch

A register carries the display signal information. In 96 X 65 display-mode, data will be fed to the

HV-buffer Cell and level-shifted to the required level.

7.10 Level selector

Level Selector is a control of the display synchronization. Display voltage can be separated into

two sets and used with different cycles. Synchronization is important since it selects the

required LCD voltage level to the HV Buffer Cell, which in turn outputs the COM or SEG LCD

waveform.

7.11 HV Buffer Cell (Level Shifter)

HV Buffer Cell works as a level shifter, which translated the low voltage output signal to the

required driving voltage. The output is shifted out with an internal FRM clock, which comes

from the Display Timing Generator. The voltage levels are given by the level selector, which is

synchronized with the internal M signal.

OSC1

Oscillator

enable

Internal Resistor

OSC2

Buffer

enable

Oscillation Circuit

enable

(CL)

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