LSM303D datasheet(35/52 Pages) STMICROELECTRONICS

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LSM303D

AODR [3:0] is used to set power mode and ODR selection. In the following table bit

selection of AODR [3:0] for all frequencies is shown.

8.18

CTRL2 (21h)

Table 36. Acceleration data rate configuration

AODR3

AODR2

AODR1

AODR0

Power mode and ODR selection

Power-down mode

3.125 Hz

6.25 Hz

12.5 Hz

25 Hz

50 Hz

100 Hz

200 Hz

400 Hz

800 Hz

1600 Hz

Table 37. CTRL2 register

ABW1

ABW0

AFS2

AFS1

AFS0

0(1)

1. This bit must be set to ‘0’ for correct operation of the device.

AST

SIM

Table 38. CTRL2 register description

ABW[1:0]

Accelerometer anti-alias filter bandwidth. Default value: 00

Refer to Table 39

AFS[2:0]

Acceleration full-scale selection. Default value: 000

Refer to Table 40

AST

Acceleration self-test enable. Default value: 0

(0: self-test disabled; 1: self-test enabled)

SIM

SPI serial interface mode selection. Default value: 0

(0: 4-wire interface; 1: 3-wire interface)

Table 39. Acceleration anti-alias filter bandwidth

ABW1

ABW0

Anti-alias filter bandwidth

773 Hz

194 Hz

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