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STM32L476RG 데이터시트(PDF) 219 Page - STMicroelectronics |
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STM32L476RG 데이터시트(HTML) 219 Page - STMicroelectronics |
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219 / 232 page ![]() DocID025976 Rev 4 219/232 STM32L476xx Package information 228 Figure 59. WLCSP81- 81-ball, 4.4084 x 3.7594 mm, 0.4 mm pitch wafer level chip scale package recommended footprint Device marking The following figure gives an example of topside marking orientation versus ball A1 identifier location. F - 0.6042 - - 0.0238 - G - 0.2797 - - 0.0110 - aaa - - 0.100 - - 0.0039 bbb - - 0.100 - - 0.0039 ccc - - 0.100 - - 0.0039 ddd - - 0.050 - - 0.0020 eee - - 0.050 - - 0.0020 1. Values in inches are converted from mm and rounded to 4 decimal digits. 2. Back side coating 3. Dimension is measured at the maximum bump diameter parallel to primary datum Z. Table 109. WLCSP81 recommended PCB design rules (0.4 mm pitch) Dimension Recommended values Pitch 0.4 mm Dpad 0.225 mm Dsm 0.290 mm typ. (depends on the soldermask registration tolerance) Stencil opening 0.250 mm Stencil thickness 0.100 mm Table 108. WLCSP81- 81-ball, 4.4084 x 3.7594 mm, 0.4 mm pitch wafer level chip scale package mechanical data (continued) Symbol millimeters inches(1) Min Typ Max Min Typ Max |
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