| 전자부품 데이터시트 검색엔진 |
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NSC800 데이터시트(PDF) 46 Page - National Semiconductor (TI) |
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NSC800 데이터시트(HTML) 46 Page - National Semiconductor (TI) |
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46 / 76 page ![]() 129 Rotate and Shift (Continued) 76543210 11001011 RRC r 0 0 0 0 1 r (Note alternate for A register below) Timing M cycles 2 T states 8 (4 4) Addressing Mode Register 76543210 0 0 0 0 1 1 1 1 RRCA Timing M cycles 1 T states 4 Addressing Mode Implied (Note RRCA does not affect S Z or PV flags) RR r Rotate register r right through carry TLC5171 – 60 S Set if result is negative Z Set if result is zero H Reset PV Set if result parity is even N Reset C Set according to bit 0 of r 76543210 11001001 RR r 00011 r (Note alternate for A register below) Timing M cycles 2 T states 8 (4 4) Addressing Mode Register 76543210 00011111 RRA Timing M cycles 1 T states 4 Addressing Mode Implied (Note RRA does not affect S Z or PV flags) SLA r Shift register r left arithmetric TLC5171 – 61 S Set if result is negative Z Set if result is zero H Reset PV Set if result parity is even N Reset C Set according to bit 7 of r 76543210 11001011 00100 r Timing M cycles 2 T states 8 (4 4) Addressing Mode Register SRA r Shift register r right arithmetic TLC5171 – 62 S Set if result is negative Z Set if result is zero H Reset PV Set if result parity is even N Reset C Set according to bit 0 of r 76543210 11001011 00101 r Timing M cycles 2 T states 8 (4 4) Addressing Mode Register SRL r Shift register r right logical TLC5171 – 63 S Reset Z Set if result is zero H Reset PV Set if result parity is even N Reset C Set according to bit 0 of r 76543210 11001011 00111 r Timing M cycles 2 T states 8 (4 4) Addressing Mode Register 46 |
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