Philips Semiconductors

Product data

PCKV857A

100-250 MHz differential 1:10 clock driver

2003 Jul 31

5

DC ELECTRICAL CHARACTERISTICS

Over recommended operating conditions. Voltages are referenced to GND (ground = 0 V).

LIMITS

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Input voltage, all inputs

—

—

−1.2

V

—

—

V

HIGH-level output voltage

1.7

—

—

V

—

—

0.1

V

LOW-level output voltage

—

—

0.6

V

Input current

—

—

±10

µA

HIGH-impedance-state output current

—

—

±10

µA

CLK and CLK = 0 MHz,

PWRDWN = LOW;

—

30

100

µA

—

200

300

mA

—

8

10

mA

Input capacitance

2

2.8

3

pF

NOTE:

1. This is intended to operate in the SSTL_2 type IV unterminated mode without series resistors on the outputs.

TIMING REQUIREMENTS

Over recommended ranges of supply voltage and operating free-air temperature.

SYMBOL

PARAMETER

MIN

MAX

UNIT

Operating clock frequency

100

250

MHz

Input clock duty cycle

40

60

%

100

—

µs

NOTE:

1. Time required for the integrated PLL circuit to obtain phase lock of its feedback signal to its reference signal after power-up.